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The computational efficiency of artificial intelligence is a kind of double-edged sword. On the one hand, it should learn quite quickly, but the more “accelerated” the neural network — the more it consumes energy. So it can become simply unprofitable. However, the way out of the situation can give IBM, which has demonstrated new methods of teaching AI, which will allow it to learn several times faster at the same level of resources and energy.
To achieve these results, IBM had to abandon the methods of calculation using 32-and 16-bit techniques, developing an 8-bit technique, as well as a new chip to work with it.
“The next generation of AI applications will require faster response times, larger workloads, and the ability to work with multiple data streams. To unlock the full potential of AI, we will redesign all hardware completely. Scaling AI with new hardware solutions is part of the IBM Research program to move from a narrow AI, often used for specific, well-defined tasks, to a multi-disciplinary AI that covers all areas.”said Jeffrey Welser, Vice President and Director of IBM Research.
All IBM developments were presented within the framework of NeurIPS 2018 in Montreal. Engineers of the company told about two developments. The first is called ” deep machine learning of neural networks using 8-bit floating point numbers.”In it, they describe how they managed to reduce the arithmetic accuracy for applications from 32 bits to 16 bits and store it on an 8-bit model. Experts say that their technique accelerates the learning time of deep neural networks by 2-4 times compared to 16-bit systems. The second development is “8-bit multiplication in memory with projected phase transition memory”. Here, experts reveal a method that compensates for the low accuracy of analog AI chips, allowing them to consume 33 times less energy than comparable digital AI systems.
“The improved accuracy achieved by our research team indicates that in-memory computing can provide high-performance deep learning in low-power environments. As with our digital accelerators, our analog chips are designed to scale and train AI and output through visual, speech, and text datasets and extend to multi-disciplinary AI.”
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